This project simulates a Full-Adder using AND, OR, and NOT logic gates. Click on the yellow inputs to toggle between 0 and 1 and then click on the Green Flag to compute the outputs. The circuit then computes the Sum and Carry Out digits. Use the project to verify that the inputs do produce: Carry In Digit 0 1 1 1 0 0 0 1 Binary Digit 1 0 0 1 1 1 0 1 0 Binary Digit 2 0 0 0 1 1 1 0 1 ****************************************************** These outputs. Sum 0 1 0 1 0 1 1 0 Carry Out Digit 0 0 1 1 1 0 0 1 ****************************************************** A Full-Adder accepts a carry-in digit (either 0 or 1), computes the sum of two binary digits (either 0 or 1), and then outputs a carry-out digit (either a 0 or 1)
This implementation of a full adder is not as efficient in the number of circuit elements (logic gates) used as my project Full adder Using XOR and AND gates (https://scratch.mit.edu/projects/642224075/) that uses just 5 logic gates as opposed to the 9 logic gates used in this project. Reducing the number of elements in a circuit is always a goal of the circuit designer.
