This project illustrates how to connect two half adders to form a full adder. Click on the inputs to toggle between 0 and 1 and then click on the Green Flag to compute the outputs. The circuit then computes the Sum and Carry Out digits. Use the project to verify that the inputs do produce: Carry In Digit 0 1 1 1 0 0 0 1 Binary Digit 1 0 0 1 1 1 0 1 0 Binary Digit 2 0 0 0 1 1 1 0 1 ****************************************************** These outputs. Sum 0 1 0 1 0 1 1 0 Carry Out Digit 0 0 1 1 1 0 0 1 ****************************************************** The Make a Block option is used to model the XOR, AMD, and OR gates.
See my other logic gate project: Half Adder https://scratch.mit.edu/projects/244661995/ XOR Full Adder https://scratch.mit.edu/projects/642224075/ Full Adder Using AND, OR, and NOT Logic Gates https://scratch.mit.edu/projects/651492701/ XOR Gate https://scratch.mit.edu/projects/3270654/ NAND Gate https://scratch.mit.edu/projects/500283359/
